Marco Rocchetto's website
WELCOME
ABOUT ME
Marco Rocchetto
Co-founder of V-Research
R&D for cybersecurity engineering
2017-2019, senior research engineer at
UTRC
United Technologies Corp. (UTC)
2017, postdoctoral researcher at
SaToSS
University of Luxembourg
2016, postdoctoral researcher at
iTrust
Singapore University of Technology and Design
SCy-Phy group
2011-2015, Ph.D. student at
REGIS lab.
Universitià di Verona
RESEARCH INTERESTS
- Formal methods for security and privacy
- Cyber-Physical System security
- Security protocols
- Web applications security
PAST ACADEMIC PROJECTS
- COMMA (Postdoctoral researcher)
Combatting Context-Sensitive Mobile Malware (COMMA)
Affiliation: University of Luxembourg - ASPIRE (Postdoctoral researcher)
T4: Attacker Models
Affiliation: Singapore University of Technology and Design - SPaCIoS (PhD student)
project no. 257876, FP7-ICT-2009-5, ICT-2009.1.4: Trustworthy ICT
Affiliation: Università di Verona - AVANTSSAR (Research assistant)
project no. 216471, FP7-ICT-2007-1, ICT-1-.4: Secure, dependable and trusted Infrastructures
Affiliation: Università di Verona
ACTIVITIES
- Technical Program Committee - IWCMC-MC 2017
- Technical Program Committee - CCN-CPS 2017
- Reviewer - CPSS 2017
- Reviewer - Journal on Formal Aspects of Computing 2016
- Technical Program Committee - SecCPS 2016
- Technical Program Committee - CCN-CPS 2016
- Reviewer - STM 2016
- Reviewer - ESORICS 2016
- Reviewer - Ad Hoc Networks journal (Certificate)
- Technical Program Committee - IWCMC-MC 2016
- Steering Committee - CSF 2015
- Reviewer - Special Issue of the Journal of Automated Reasoning on Interpolation Techniques for Program Verification and Synthesis
